VVIP Lab
Vertically-integrated VLSI Information Processing
Welcome to VVIP Lab
VVIP Lab (Vertically-integrated VLSI information processing lab) aims to research energy- and latency-efficient integrated circuits, architectures, and systems for machine learning and signal processing algorithms by leveraging non-von Neumann approaches including in-memory computing, in-sensor computing, and neuromorphic computing with both CMOS and emerging devices.
[Update] New paper accepted in VLSI Symp.25. Congratulations, Chang Eun, Keming !
[Update] New paper accepted in ISCA25. Congratulations, Chang Eun, Priyansh, Zihan !
[Update] New paper accepted in DAC25. Congratulations, Yun Chia and Sohyeon !
[Update] New paper accepted in IEEE Transaction VLSI. Congratulations, Zihan !
[Update] New paper accepted in JXCDC. Congratulations, Keming and Ashkan !
[Update] New paper accepted in ESSERC24 (former ESSCIRC). Congratulations, Ashkan !
[Update] New paper accepted in ESSERC24 (former ESSCIRC). Congratulations, Chang Eun and Keming !
[Update] New paper accepted in ISLPED24. Congratulations, Chang Eun and Ashkan !
[Update] New paper accepted in DAC24. Congratulations, Zihan !
[Update] VVIPLab joins DARPA & SRC-funded JUMP2.0 PRISM center !
[Update] New paper accepted in CICC24. Congratulations, Chang Eun and Yidong !
[Update] New paper accepted in JSSC. Congratulations, Sadhana & Yugandhar & Yidong !
[Update] New paper accepted in CICC23. Congratulations, Sadhana & Yugandhar & Yidong !
[Update] Prof. Kang won "INTEL 2022 Rising Star Award".
[Update] New paper accepted in MICRO22. Congratulations, Ashkan and Zheng !
[Update] New paper accepted in ISCA22. Congratulations, Zheng !
UCSD Electrical and Computer Engineering (ECE) Department